New chip design promises speed and energy savings Thursday, 25 August 2016

American engineers have built a new computer chip they say can substantially increase processing speed while slashing energy needs.

The researchers from Princeton University's electrical engineering faculty say the architecture enables thousands of chips to be connected together into a single system containing millions of cores.

It is called Piton, after the metal spikes driven by rock climbers into mountainsides to aid in their ascent, because it is designed to scale.

"With Piton, we really sat down and rethought computer architecture in order to build a chip specifically for data centers and the cloud," said Assistant Professor David Wentzlaff.

"The chip we've made is among the largest chips ever built in academia and it shows how servers could run far more efficiently and cheaply."

The current version of the Piton chip measures 6 x 6 mm. The chip has over 460 million transistors, each of which are as small as 32 nanometers - too small to be seen by anything but an electron microscope.

The bulk of these transistors are contained in 25 cores, the independent processors that carry out the instructions in a computer program. Most personal computer chips have four or eight cores. In general, more cores mean faster processing times, so long as software ably exploits the hardware's available cores to run operations in parallel. Therefore, computer manufacturers have turned to multi-core chips to squeeze further gains out of conventional approaches to computer hardware.

"What we have with Piton is really a prototype for future commercial server systems that could take advantage of a tremendous number of cores to speed up processing," said Wentzlaff.

The Piton chip also gains efficiency by its management of memory stored on the chip itself. The cache memory is used for frequently accessed information and, in most designs, is shared across all of the chip's cores. But that strategy can backfire when multiple cores access and modify the cache memory.

Piton sidesteps this problem by assigning areas of the cache and specific cores to dedicated applications. The researchers say the system can increase efficiency by 29% when applied to a 1,024-core architecture. They estimate that the savings would multiply as the system is deployed across millions of cores in a data center.

[A bank of Piton processors. Photo: Princeton Parallel Group]